initial commit

abd6f248 · Andrea Abba · abd6f248 · abd6f248 · abd6f248 · abd6f248
Commit abd6f248 authored 1 month ago by Andrea Abba
--- a/.gitignore
+++ b/.gitignore
+# Ignora tutto di default
+*
+
+# Non ignorare le cartelle di base (serve se vuoi includere i folder)
+!*/
+!.gitignore
+# Includi la cartella docs e TUTTI i suoi contenuti
+!/docs/
+!/docs/**
+
+# Includi SOLO i file JSON all’interno di /library (se vuoi tutto /library aggiungi !/library/**)
+!/library/
+!/library/*.json
+!/library/**/*.json
+
+# Includi i file .NIU che si trovano in /output
+!/output/
+!/output/*.NIU
+
+# Includi globalmente i file con estensioni .jpg, .svg, .scf, .md e .py
+!/*.jpg
+!/*.svg
+!/*.scf
+!/*.md
+!/*.py
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--- a/README.md
+++ b/README.md
+# Threshold Discriminator with Event Counter
+
+This project demonstrates how to:
+- **Create and use custom registers** in Sci-Compiler (e.g., `THRESHOLD`, `RESET`, `COUNTS`)  
+- **Compare** an analog input signal against a programmable threshold  
+- **Count** threshold‐crossing events  
+- **View** both analog and digital signals on the integrated Oscilloscope  
+
+In addition, we use a **Pulse Generator** as a test signal source, feeding the DT1260 input connector through a 5× attenuator.  
+
+---
+
+## 1. Block Diagram
+
+
+- **Analog In Pin (A0)**: Receives the external signal (from the Pulse Generator output).
+- **GREATER** Comparator: Compares `A0` (>16-bit) to `THRESHOLD` register value.
+- **EDGE DET. RISE**: Detects rising edges from the comparator output.
+- **COUNTER RISING**: Increments on each rising edge (i.e., each time `A0` crosses above threshold).
+- **REG: THRESHOLD**: A 16-bit register to store the user‐programmable threshold value.
+- **REG: RESET**: A register to reset the counter when toggled from software (write 1 then 0).
+- **REG: COUNTS**: A 32-bit register holding the current count.
+- **Oscilloscope**: Allows us to visualize the input signal (on Channel 1) and any digital lines (D0, D1, etc.).
+- **Pulse Generator (PWM)**: Generates a periodic pulse for testing; its output is routed externally into the A0 input.
+
+
+![Counter with register schematic](docs/2025-03-05-20-24-01.png)
+
+![Pulse generator to generate test signal](docs/2025-03-05-20-24-36.png)
+
+
+---
+
+## 2. Creating the Registers
+
+1. **Right‐Click** on the pin or net you wish to turn into a register input or output.  
+   ![Short-cut to create register](docs/2025-03-05-20-21-08.png)
+2. **Select** “Fanout pin to Register.”  
+3. In the **Configure Register** dialog:
+   - **Mode**: *Bit Vector* (for numeric registers).  
+   - **Size**: 16 bits (for THRESHOLD) or 32 bits (for COUNTS).  
+   - **Register Name**: e.g. `THRESHOLD`, `RESET`, `COUNTS`.
+
+   ![Create Threshold register](docs/2025-03-05-20-22-02.png)
+4. Press **OK**.
+
+Repeat this for each register you need. You’ll see them appear in the schematic as **mmcRegister** blocks.
+
+---
+
+## 3. Assigning Register Addresses
+
+After adding all registers:
+
+1. Open **Hardware** → **Resource Explorer** → **Memory Map**.  
+2. Press **Refresh** then **Auto Assign** to allocate physical addresses.  
+   - For example:  
+     - `THRESHOLD` might get address `0x0`  
+     - `RESET` might get `0x807`  
+     - `COUNTS` might get `0x808`
+
+These addresses are how you read/write each register from software.
+
+![Address assignment](docs/2025-03-05-20-25-25.png)
+
+---
+
+## 4. Connecting the Hardware
+
+1. **Output** of the PWM (on DT1260 front panel, labeled *I/O1* or similar) → through a **5× attenuator** → **CH1** input.  
+2. Ensure the analog input is set to **50 Ω** termination if available.  
+3. This input is digitized and fed into the **A0** pin of the FPGA design.
+
+---
+
+## 5. Using the Oscilloscope
+
+1. **Compile & Program** your design to the DT1260.  
+2. In **Resource Explorer**, connect over **USB** (or Ethernet) and expand **Oscilloscope** → **Oscilloscope_0**.  
+3. Right-click → **View** 
+![View oscilloscope in Resource Explorer](docs/2025-03-05-20-31-55.png)
+
+4. **Channel Selection**: Enable *Channel 1* to see the incoming analog.  
+5. **Trigger Mode**: *Auto* or *Single* (to capture pulses).  
+6. **Trigger Source**: If you want the scope to trigger on the analog level, set **Trigger Source** = Channel 1 and **Trigger Level (lsb)** = e.g. 2200.  
+   - *Important*: This **Oscilloscope** trigger is not the same as the **GREATER** comparator threshold in your logic. They are independent settings.
+
+   
+![Triggered Signal](docs/2025-03-05-20-32-27.png)
+
+---
+
+## 6. Monitoring the Registers in a Table
+
+1. In the **Resource Explorer**, under **Registers**, create a **New Table**.  
+   ![Create a table for register](docs/2025-03-05-20-34-37.png)
+
+2. Right click on Registers and then **Add All to Table** to populate the table with your discovered registers (`THRESHOLD`, `RESET`, `COUNTS`, etc.).  
+3. You can:
+   - **Write** a value to `THRESHOLD` (e.g., 2200) and click **Set**.  
+   - **Read** the current `COUNTS` value repeatedly (click **Get** or **Get All**) to see how many times the analog signal has crossed the threshold.  
+4. **Reset** the counter by writing **1** to `RESET` and then **0** again.
+
+![Add all register to the table and set threshold](docs/2025-03-05-20-35-24.png)
+
+**Note**: The threshold in the `THRESHOLD` register is for the logic comparator, NOT for the Oscilloscope’s trigger. Setting the Oscilloscope trigger level does not change the FPGA comparator threshold (and vice versa).
+
+---
+
+## 7. Observing the Signals
+
+![External connection to signal pulser](docs/2025-03-05-20-33-28.png)
+
+- **Oscilloscope**:
+  - Channel 1 (analog trace): The actual input waveform.  
+  - Digital Lines (e.g., D0, D1) can be driven by the comparator or edge detector if you connect them. This allows you to see visually when the signal is above threshold or when the edge is detected.
+- **COUNTS register**: Increments each time `A0` surpasses the threshold (on a rising transition).
+
+If you see the digital trace go high in the scope (above threshold) and the rising-edge pulse on another trace, you should also see `COUNTS` increment in the register table each time that pulse occurs.
+
+![Oscilloscope with comparator](docs/2025-03-05-20-37-14.png)
+
+![Counter counting](docs/2025-03-05-20-39-50.png)
+---
+
+## 8. Summary & Key Points
+
+1. **Threshold vs Oscilloscope Trigger**: They’re separate parameters. The first is for your custom comparator logic, the second is for capturing the waveform in the scope.  
+2. **Registers**:  
+   - *THRESHOLD* (16 bits) sets the FPGA’s comparator threshold.  
+   - *RESET* is toggled (1 then 0) to clear the event counter.  
+   - *COUNTS* (32 bits) holds the number of threshold‐cross events.  
+3. **Resource Explorer**:  
+   - **Oscilloscope** tab to see waveforms.  
+   - **Registers** tab (New Table) to read/write your custom registers.  
+4. **Hardware**: Use a suitable attenuator and 50 Ω input to avoid saturating the analog input.
+
+By combining the **Comparator**, **Edge Detector**, **Counter**, and memory‐mapped registers, you have a configurable threshold discriminator that counts how many times the incoming analog signal crosses the desired level.
+
+
+
+
+
+
+
+
+
+
+
+
--- a/docs/2025-03-05-20-21-08.png
+++ b/docs/2025-03-05-20-21-08.png
--- a/docs/2025-03-05-20-22-02.png
+++ b/docs/2025-03-05-20-22-02.png
--- a/docs/2025-03-05-20-24-01.png
+++ b/docs/2025-03-05-20-24-01.png
--- a/docs/2025-03-05-20-24-36.png
+++ b/docs/2025-03-05-20-24-36.png
--- a/docs/2025-03-05-20-25-25.png
+++ b/docs/2025-03-05-20-25-25.png
--- a/docs/2025-03-05-20-31-55.png
+++ b/docs/2025-03-05-20-31-55.png
--- a/docs/2025-03-05-20-32-27.png
+++ b/docs/2025-03-05-20-32-27.png
--- a/docs/2025-03-05-20-33-28.png
+++ b/docs/2025-03-05-20-33-28.png
--- a/docs/2025-03-05-20-34-37.png
+++ b/docs/2025-03-05-20-34-37.png
--- a/docs/2025-03-05-20-35-24.png
+++ b/docs/2025-03-05-20-35-24.png
--- a/docs/2025-03-05-20-37-14.png
+++ b/docs/2025-03-05-20-37-14.png
--- a/docs/2025-03-05-20-39-50.png
+++ b/docs/2025-03-05-20-39-50.png
--- a/lab3_discriminator.jpg
+++ b/lab3_discriminator.jpg
--- a/lab3_discriminator.scf
+++ b/lab3_discriminator.scf
--- a/lab3_discriminator.svg
+++ b/lab3_discriminator.svg
--- a/library/RegisterFile.json
+++ b/library/RegisterFile.json
+{
+  "Device": "SCIDK",
+  "Registers": [
+    {
+      "Name": "THRESHOLD",
+      "Address": 0,
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined"
+    },
+    {
+      "Name": "RESET",
+      "Address": 2055,
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined"
+    },
+    {
+      "Name": "COUNTS",
+      "Address": 2056,
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined"
+    },
+    {
+      "Name": "ANALOG_OFFSET",
+      "Address": 4294967289,
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "AnalogAFE"
+    }
+  ],
+  "Version": null,
+  "GenerationData": "0001-01-01T00:00:00",
+  "MMCComponents": [
+    {
+      "Name": "Oscilloscope_0",
+      "Type": "Oscilloscope",
+      "Address": 1024,
+      "Version": "1.0.0.0",
+      "bins": 0,
+      "CountsBit": 0,
+      "UseDMA": false,
+      "Registers": [
+        {
+          "Name": "READ_STATUS",
+          "Address": 2048,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "READ_POSITION",
+          "Address": 2049,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "CONFIG_TRIGGER_MODE",
+          "Address": 2050,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "CONFIG_PRETRIGGER",
+          "Address": 2051,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "CONFIG_TRIGGER_LEVEL",
+          "Address": 2052,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "CONFIG_ARM",
+          "Address": 2053,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        },
+        {
+          "Name": "CONFIG_DECIMATOR",
+          "Address": 2054,
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined"
+        }
+      ],
+      "Channels": 1,
+      "ChannelsList": null,
+      "nsamples": 1024,
+      "WordSize": 16,
+      "BinsX": 0,
+      "BinsY": 0,
+      "WordEnob": 16,
+      "AnalogInputs": 1,
+      "DigitalInputs": 4,
+      "SamplingFrequency": 0,
+      "TimeMultiplexing": 1,
+      "DecimatorMax": 0
+    }
+  ]
+}
\ No newline at end of file
--- a/library/RegisterFileTree.json
+++ b/library/RegisterFileTree.json
+{
+  "Name": "top",
+  "Path": "",
+  "PageGuid": "68432dfd-ce71-4c82-b0d3-510c12c9cee9",
+  "PageName": "top",
+  "BaseAddress": 0,
+  "RealBaseAddress": 0,
+  "PageSize": 0,
+  "MultiPageCount": 0,
+  "MultiPageIndex": 0,
+  "Elements": [
+    {
+      "Name": "Oscilloscope_0",
+      "Type": "Oscilloscope",
+      "Address": 1024,
+      "Version": "1.0.0.0",
+      "Registers": [
+        {
+          "Name": "READ_STATUS",
+          "Type": "Register",
+          "Address": 2048,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "READ_POSITION",
+          "Type": "Register",
+          "Address": 2049,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "CONFIG_TRIGGER_MODE",
+          "Type": "Register",
+          "Address": 2050,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "CONFIG_PRETRIGGER",
+          "Type": "Register",
+          "Address": 2051,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "CONFIG_TRIGGER_LEVEL",
+          "Type": "Register",
+          "Address": 2052,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "CONFIG_ARM",
+          "Type": "Register",
+          "Address": 2053,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        },
+        {
+          "Name": "CONFIG_DECIMATOR",
+          "Type": "Register",
+          "Address": 2054,
+          "Version": "",
+          "RegionSize": 1,
+          "Description": "",
+          "Category": "Undefined",
+          "Path": null
+        }
+      ],
+      "nsamples": 1024,
+      "Channels": 1,
+      "WordSize": 16,
+      "WordEnob": 16,
+      "AnalogInputs": 1,
+      "DigitalInputs": 4,
+      "SamplingFrequency": 0,
+      "TimeMultiplexing": 1,
+      "DecimatorMax": 0,
+      "DecimatorAveraging": false,
+      "Path": "/Oscilloscope_0"
+    },
+    {
+      "Name": "THRESHOLD",
+      "Type": "Register",
+      "Address": 0,
+      "Version": "1.0.0.0",
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined",
+      "Path": "/THRESHOLD"
+    },
+    {
+      "Name": "RESET",
+      "Type": "Register",
+      "Address": 2055,
+      "Version": "1.0.0.0",
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined",
+      "Path": "/RESET"
+    },
+    {
+      "Name": "COUNTS",
+      "Type": "Register",
+      "Address": 2056,
+      "Version": "1.0.0.0",
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "Undefined",
+      "Path": "/COUNTS"
+    },
+    {
+      "Name": "ANALOG_OFFSET",
+      "Type": "Register",
+      "Address": 4294967289,
+      "Version": "1.0.0.0",
+      "RegionSize": 1,
+      "Description": "",
+      "Category": "AnalogAFE",
+      "Path": "/ANALOG_OFFSET"
+    }
+  ],
+  "Childs": [],
+  "isTop": true,
+  "Mode": "tree",
+  "Device": "SCIDK",
+  "Project": "lab3_discriminator",
+  "Magic": "13BEEBE3",
+  "Version": null,
+  "FPGA": "XC7S25CSGA225-1",
+  "BuildDate": "2025-03-05T20:25:56.1995444+01:00"
+}
\ No newline at end of file